1. Field of the Invention
The present invention relates to a thin film magnetic memory device, and particularly to a thin film magnetic memory device provided with memory cells having MTJs (magnetic tunnel junctions).
2. Description of the Background Art
Attention is being given to an MRAM device as a memory device, which can nonvolatilely store data with low power consumption. The MRAM device is a memory device, in which a plurality of thin film magnetic members are formed in a semiconductor integrated circuit for nonvolatilely storing data, and random access to each thin film magnetic member is allowed.
Particularly, in recent years, it has been announced that a performance of the MRAM device can be dramatically improved by using the thin film magnetic members, which utilize the magnetic tunnel junctions, as memory cells. The MRAM device with memory cells having the magnetic tunnel junctions has been disclosed in technical references such as “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in Each Cell”, ISSCC Digest of Technical Papers, TA7.2, February 2000, “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, ISSCC Digest of Technical Papers, TA7.3, February 2000, and “A 256 kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM”, ISSCC Digest of Technical Papers, TA7.6, February 2001.
FIG. 30 conceptually shows a structure of a memory cell, which has a magnetic tunneling junction, and may be merely referred to as an “MTJ memory cell” hereinafter.
Referring to FIG. 30, a MTJ memory cell includes a tunneling magneto-resistance element TMR having an electric resistance, which is variable in accordance with a data level of magnetically written storage data, and an access transistor ATR. Access transistor ATR is located between a bit line BL and a source voltage line SRL, and is connected in series to tunneling magneto-resistance element TMR. Typically, access transistor ATR is formed of a field-effect transistor arranged on a semiconductor substrate.
For the MTJ memory cell, the device includes bit line BL and a digit line DL for carrying a data write current in different directions during a data write operation, respectively, a read word line RWL for instructing data reading, and source voltage line SRL for puling down tunneling magneto-resistance element TMR to a predetermined voltage Vss (e.g., ground voltage) during a data read operation. In the data read operation, tunneling magneto-resistance element TMR is electrically coupled between source voltage line SRL and bit line BL in response to turn-on of access transistor ATR.
FIG. 31 conceptually shows an operation of writing data in the MTJ memory cell.
Referring to FIG. 31, tunneling magneto-resistance element TMR has a ferromagnetic material layer FL, which has a fixed and uniform magnetization direction, and may be merely referred to as a “fixed magnetic layer” hereinafter, and a ferromagnetic material layer VL, which is magnetized in a direction depending on an externally applied magnetic field, and may be merely referred to as a “free magnetic layer” hereinafter. A tunneling barrier (tunneling film) TB formed of an insulator film is disposed between fixed magnetic layer FL and free magnetic layer VL. Free magnetic layer VL is magnetized in the same direction as fixed magnetic layer FL or in the opposite direction in accordance with the level of the storage data to be written. Fixed magnetic layer FL, tunneling barrier TB and free magnetic layer VL form a magnetic tunnel junction.
Tunneling magneto-resistance element TMR has an electric resistance, which is variable depending on a correlation in magnetization direction between fixed magnetic layer FL and free magnetic layer VL. More specifically, the electric resistance value of tunneling magneto-resistance element TMR takes a minimum value Rmin when the magnetization directions of fixed magnetic layer FL and free magnetic layer VL are equal (parallel) to each other. When the magnetization directions of them are opposite (anti-parallel) to each other, the above electric resistance value takes a maximum value Rmax.
In the data write operation, read word line RWL is inactive, and access transistor ATR is off. In this state, the data write currents for magnetizing free magnetic layer VL are supplied to bit line BL and digit line DL in directions depending on the level of write data, respectively.
FIG. 32 conceptually shows a relationship between the data write current and the magnetization direction of the tunneling magneto-resistance element in the data write operation.
Referring to FIG. 32, an abscissa H(EA) gives a magnetic field, which is applied in an easy axis (EA) to free magnetic layer VL of tunneling magneto-resistance element TMR. An ordinate H(HA) indicates a magnetic field acting in a hard axis (HA) on free magnetic layer VL. Magnetic fields H(EA) and H(HA) correspond to two magnetic fields produced by currents flowing through bit line BL and digit line DL, respectively.
In the MTJ memory cell, the fixed magnetization direction of fixed magnetic layer FL is parallel to the easy axis of free magnetic layer VL, and free magnetic layer VL is magnetized in the easy axis direction, and particularly in the same parallel direction, which is the same direction as fixed magnetic layer FL, or in the anti-parallel direction, which is opposite to the above direction, depending on the level (“1” or “0”) of the storage data. The MTJ memory cell can selectively store data (“1” and “0”) of one bit corresponding to the two magnetization directions of free magnetic layer VL.
The magnetization direction of free magnetic layer VL can be rewritten only when a sum of applied magnetic fields H(EA) and H(HA) falls within a region outside an asteroid characteristic line shown in FIG. 32. Therefore, the magnetization direction of free magnetic layer VL does not switch when the data write magnetic fields applied thereto have intensities corresponding to a region inside the asteroid characteristic line.
As can be seen from the asteroid characteristic line, the magnetization threshold required for switching the magnetization direction along the easy axis can be lowered by applying the magnetic field in the direction of the hard axis to free magnetic layer VL.
When the operation point in the data write operation is designed, for example, as shown in FIG. 32, the data write magnetic field in the MTJ cell selected as a data write target is designed such that the data write magnetic field in the direction of the easy axis has an intensity of HWR. Thus, the data write current flowing through bit line BL or digit line DL is designed to take a value, which can provide the data write magnetic field of HWR. In general, data write magnetic field HWR is represented by a sum of a switching magnetic field HSW required for switching the magnetization direction and a margin ΔH. Thus, it is represented by an expression of HWR=HSW+ΔH.
For rewriting the storage data of the MTJ memory cell, i.e., the magnetization direction of tunneling magneto-resistance element TMR, it is necessary to pass the data write currents at a predetermined level or higher through digit line DL and bit line BL. Thereby, free magnetic layer VL in tunneling magneto-resistance element TMR is magnetized in the parallel direction as fixed magnetic layer FL or anti-parallel direction in accordance with the direction of the data write magnetic field along the easy axis (EA). The magnetization direction, which was once written into tunneling magneto-resistance element TMR, and thus the storage data of MTJ memory cell is held nonvolatilely until next data writing is executed.
FIG. 33 conceptually shows an operation of reading data from the MTJ memory cell.
Referring to FIG. 33, access transistor ATR is turned on in response to activation of read word line RWL in the data read operation. Thereby, tunneling magneto-resistance element TMR is electrically coupled to bit line BL while being pulled down with predetermined voltage Vss (ground voltage GND).
In this state, bit line BL is pulled up with another predetermined voltage, whereby a current path including bit line BL and tunneling magneto-resistance element TMR carries a memory cell current Icell corresponding to storage data of the MTJ memory cell. For example, this memory cell current Icell is compared with a predetermined reference current, whereby storage data can be read out from the MTJ memory cell.
As described above, the electric resistance of tunneling magneto-resistance element TMR is variable in accordance with the magnetization direction, which is rewritable by the data write magnetic field applied thereto. Therefore, nonvolatile data storage can be executed by establishing a correlation of electric resistances Rmax and Rmin of tunneling magneto-resistance element TMR with respect to levels (“1” and “0”) of the storage data.
As described above, the MRAM device executes the data storage by utilizing a difference ΔR (=Rmax−Rmin) in junction resistance of tunneling magneto-resistance element TMR corresponding to a difference between storage data levels. Thus, the data read operation is executed based on the detection of passing current Icell of the selected memory cell.
In general, a reference cell is employed independently of the normal MTJ memory cells which are employed for executing the data storage, for producing a reference current to be compared with memory cell current Icell. The reference current produced by the reference cell is designed to take a value intermediate between two kinds of values of memory cell current Icell corresponding to two kinds of electric resistances Rmax and Rmin of the MTJ memory cell, respectively.
More specifically, the reference cell must be produced to have an electric resistance at a level intermediate between electric resistances Rmax and Rmin. However, special designing and manufacturing are required for achieving such electric resistances. This complicates the structure of reference cell so that a chip area may increase, and a working or processing margin of a memory cell array may lower.
Particularly, in a structure including such dummy cells in a region other than a region of the normal memory cells, a current path including the dummy cell is formed in a region spaced from a region, in which a current path including the normal MTJ memory cell selected as the access target is formed. Therefore, influences of noises and others may increase to impair the read margin in the data read operation.